Tutorial 1 VLSI Electric NANDNOR Layout Design

>> YOUR LINK HERE: ___ http://youtube.com/watch?v=Jqj8VmS38fw

Tutorial 1: How to design a NAND/NOR logic gates Layout on VLSI Electric and then simulate it using LT Spice • http://www.youtube.com/watch?v=Jqj8Vm... • Tutorial 2: How to design a Full Adder Layout on VLSI Electric and then simulate it using LT Spice • http://www.youtube.com/watch?v=TpL7YQ... • Programs used: • ElectricBinary-9.04 • LT Spice 4.20c • The following link is a tutorial made by Professor Jake Baker. • The 1st tutorial: Talks about the manufacturing of a resistor • The 2nd tutorial: Design of PMOS NMOS, Schematics, Layout and Simulation • The 3rd tutorial: Design of an Inverter, Logic Gate, Schematics, Layout and Simulation • The 4th tutorial: Design of NAND,Logic Gate, Schematics, Layout and Simulation • / efabless • Next is the website that has the rest of the information • http://cmosedu.com/ • The simulator`s name used in the simulation process is LT spice . • Electric VLSI basically converts your design into a spice code so that can be exported to the spice simulator. • Just go to Google and type LT spice download and then download the program then follow the instructions listed in the link below: • http://cmosedu.com/cmos1/ltspice/ltsp... • The final step is to save the following text on your PC, since it is the library used to convert the model names into spice parameters. • http://cmosedu.com/cmos1/electric/C5_... • PS: Download 3D Java you`ll thank me for it when go through the 2nd tutorial @ (24:55) • Credits goes to Professor Jake Baker and his tutorials. • This is just a tutorial video and the software used is an open source program, I am not claiming ownership on any of the material used. • Enjoy :)

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