How to Create a Super Simple Bootloader Part 4 Developing the App Code
YOUR LINK HERE:
http://youtube.com/watch?v=MFIzI-UNaEs
Find out more information: https://wiki.st.com/stm32mcu • Development board used: https://bit.ly/ST-NUCLEO-G071RB • STM32CubeIDE quick start guide: http://bit.ly/CubeIDE-QuickStart • • Learn how to create your STM32-based application using STM32CubeIDE and use its Linker Script to create segments of memories, place variables in RAM and FLASH, allocate functions in the desired memory region, and even how to share code between your application and custom bootloader. • • The STM32CubeIDE is be used to create a super simple bootloader, after covering the basics of the linker script and evolves into creating an application that runs after the bootloader starts in a different portion of the memory. This video series also shows how to debug Bootloader and Application simultaneously and how to create a static library shared between both projects. • • Benefits you will take away: • • • Understand the basics of the linker script • • Understand how to place variables in RAM and FLASH • • Understand how to create functions in RAM and FLASH • • Learn how to create a super simple bootloader • • Learn how to offset the interrupt vector and create an application to run in a different memory region • • Learn how to debug bootloader and application • • Learn how to share an API between bootloader and application • • The code example and content used in this video series can be downloaded from here: https://www.st.com/content/dam/AME/20... • • In this video: we’ll cover how to develop the application code, apply the needed changes in the linker script, and offset the interrupt vector. We will also cover how to debug the application and bootloader simultaneously by adding 2 binaries in the load process of the debugger settings. • • Hardware requirements: NUCLEO-G071RB is preferred, but any STM32 with Cortex-M0+ or higher can be used for the hands-on session with some minor changes. Note: STM32 with Cortex-M0 needs a different strategy when it comes to video 3 and onward, as the M0 core does not allow changing the NVIC address position due to lack of the VTOR register.
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