Proteus simulation SR flip flop











>> YOUR LINK HERE: ___ http://youtube.com/watch?v=y91Ai-4fkNo

S-R flip-flop stands for SET-RESET flip-flops. The SET-RESET flip-flop consists of two NOR gates and also two NAND gates. These flip-flops are also called S-R Latch. The design of these flip flops also includes two inputs, called the SET [S] and RESET [R]. There are also two outputs, Q and Q'. • flip flop: It checks the inputs but changes the output only at times defined by the clock signal or any other control signal.(edge trigger) • latch: It checks the inputs continuously and responds to the changes in inputs immediately. (level trigger) • more such videos :1. analog ckts--    • Proteus simulation_analog ckts   • 2.digital ckt--    • Proteus simulation_digital circuits   • 3.    • Playlist   • email - [email protected]

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